Computer Architecture Lab Session Assignment

Computer Architecture Lab Session Assignment Words: 247

1. Create and document the following series of combinational logic circuits.
a) A two – input decoder

i1 i2 d3 d2 d1 d0
0 0 0 0 0 1
0 1 0 0 1 0
1 0 0 1 0 0
1 1 1 0 0 0

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b) A three – input decoder

i2 i1 i0 d7 d6 d5 d4 d3 d2 d1 d0
0 0 0 0 0 0 0 0 0 0 1
0 0 1 0 0 0 0 0 0 1 0
0 1 0 0 0 0 0 0 1 0 0
0 1 1 0 0 0 0 1 0 0 0
1 0 0 0 0 0 1 0 0 0 0
1 0 1 0 0 1 0 0 0 0 0
1 1 0 0 1 0 0 0 0 0 0
1 1 1 1 0 0 0 0 0 0 0

c) A 2-to-1 Mux

S0 Y
0 I0
1 I1

Y = S0 I0 + So I1
d) A 4-to-1 MUX

S1 S0 Y
0 0 I0
0 1 I1
1 0 I2
1 1 I3

Y = S1 S0 I0 + S1 S0 I1 + S1 SO I2 + S1 S0 I3
e) A 2-bit Adder

X Y Sum Carry
0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1

S = ( X * Y + X * Y )
C = X * Y
f) A 4-bit Adder

Sum = A B C + A B C + A B C + A B C
Carry = A B C + A B C + A B C + A B C
= AB + AC + BC
g) A 8-bit Adder

In this we saw that for a combinational circuit of n input variables, there are 2n possible input combinations. We then came across decoder, multiplexer and adder. A decoder is basically a combinational circuit that converts binary information from the n coded inputs to a maximum of 2n unique outputs. Whereas, a multiplexer is a combinational circuit that receives binary data from one of the 2n input data lines and directs it to a single output line. Then we learnt about the two types of adder : Half adder and Full adder. A combinational circuit that performs the addition of two bits is called a half adder. A full adder is a three input and two output combinational circuit.

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Computer Architecture Lab Session Assignment. (2018, Oct 29). Retrieved August 5, 2021, from https://anyassignment.com/samples/computer-architecture-lab-session-91135/